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VLSI Physical Design: From Graph Partitioning To Timing Closure

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

Hardcover: 310 pages

Publisher: Springer; 2011 edition (February 9, 2011)

Language: English

ISBN-10: 904819590X

ISBN-13: 978-9048195909

Product Dimensions: 9.2 x 0.8 x 6.1 inches

Shipping Weight: 1.6 pounds (View shipping rates and policies)

Average Customer Review: 5.0 out of 5 stars  See all reviews (3 customer reviews)

Best Sellers Rank: #1,227,043 in Books (See Top 100 in Books) #57 in Books > Engineering & Transportation > Engineering > Electrical & Electronics > Circuits > VLSI & ULSI #213 in Books > Computers & Technology > Programming > Software Design, Testing & Engineering > Logic #331 in Books > Engineering & Transportation > Engineering > Electrical & Electronics > Electronics > Microelectronics

This book gathers together two to three decades worth of VLSI physical design into a book spanning a mere 300 pages. However, this book's compactness comes not from a lack of information, but rather its concise and excellent presentation of material. What I most like about this book is that the book is a good launching point for learning unfamiliar subjects in physical design. One can literally pick up this book, flip to the subject of interest, and quickly understand most of the major aspects of that layer of physical design. It's *refreshing* and doesn't waste my time as other books have.While the book is written to encompass an audience that is unfamiliar with VLSI physical design, it does not read as if dumbed-down or as a high-level survey. The book covers a range of topics from chip planning to detailed routing, moving from basic concepts to advanced topics that are important in modern physical design. The core techniques, notably the graph-based techniques, are described in detail and with examples, providing a foundation for the other sections of the book.The presentation of material is straightforward and well-detailed, relying heavily on examples and illustration to reinforce concepts and help in understanding. The techniques described in each chapter are likewise described and illustrated at a high level, and always followed by a detailed example, guiding the reader through the steps both algorithmically and visually. In this manner, the iterative techniques "come alive" as the objectives of the technique are stepwise achieved. Interestingly, the end of the book contains *all* the solutions to the exercises found within the chapters--something I found useful as secondary examples to the techniques described.

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