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CMOS SRAM Circuit Design And Parametric Test In Nano-Scaled Technologies: Process-Aware SRAM Design And Test (Frontiers In Electronic Testing)

The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

Series: Frontiers in Electronic Testing (Book 40)

Paperback: 194 pages

Publisher: Springer; Softcover reprint of hardcover 1st ed. 2008 edition (February 19, 2010)

Language: English

ISBN-10: 904817855X

ISBN-13: 978-9048178551

Product Dimensions: 6 x 0.5 x 9 inches

Shipping Weight: 12 ounces (View shipping rates and policies)

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Best Sellers Rank: #5,933,541 in Books (See Top 100 in Books) #83 in Books > Computers & Technology > Programming > Algorithms > Memory Management #1358 in Books > Engineering & Transportation > Engineering > Electrical & Electronics > Electronics > Semiconductors #1639 in Books > Engineering & Transportation > Engineering > Electrical & Electronics > Electronics > Microelectronics

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